SRAM (Static RAM)
Manufacturer:	Fujitsu	Speed:	12 ns
Year Introduced:		Frequency:	500 MHz
Burst Timing:	3-1-1-1	Pins:	85-ball PBGA
Voltage:	2.7-3.1v	Bandwidth:
SRAM (Static RAM) stores its data in capacitors that don't require constant recharging to retain their data; consequently, this type of RAM is faster than DRAM which results in a higher cost. Speed is approximately 8ns to 20ns - as opposed to 60ns to 80ns for DRAM. L2 Cache     Level 2 or L2 cache, memory that is external to the microprocessor. In general, L2 cache memory (SRAM), also called the secondary cache, resides on a separate chip from the microprocessor. Although, more and more microprocessors are including L2 caches into their architectures. Tag RAM     The tag RAM used as part of the cache must normally be faster than the actual cache data store. This is because the tag RAM must be read first to check for a cache hit. We want to be able to check the tag and still have enough time to read the cache within a single clock cycle, if we have a hit. So for example, you may find that your system's main cache chips are 15 ns, while the tag may be 12 ns. Pipelined Burst Static RAM     Pipelined Burst Static RAM (PB SRAM) has an access time in the range 4.5 to 8 nanoseconds (ns) and allows a transfer timing of 3-1-1-1 for bus speeds up to 133MHz. These numbers refer to the number of clock cycles for each access of a burst mode memory read. For example, 3-1-1-1 refers to three clock cycles for the first word and one cycle for each subsequent word.

Cache Burst Timings at Various Bus Speeds
Bus Speed MHz	Async SRAM	Sync Burst SRAM	Pipelined Burst SRAM
33	2-1-1-1	2-1-1-1	3-1-1-1
50	3-2-2-2	2-1-1-1	3-1-1-1
60	3-2-2-2	2-1-1-1	3-1-1-1
66	3-2-2-2	2-1-1-1	3-1-1-1
75	3-2-2-2	3-2-2-2	3-1-1-1
83	3-2-2-2	3-2-2-2	3-1-1-1
100	3-2-2-2	3-2-2-2	3-1-1-1
125	3-2-2-2	3-2-2-2	3-1-1-1

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Last Update: 5:26 PM 7/31/01