What is Pipeline Burst Cache?
| Pipeline Burst Cache |
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A type of synchronous cache that uses two techniques to minimise processor wait states - a burst mode that pre-fetches RAM contents before they are requested, and pipelining so that one memory value can be accessed in the cache at the same time that another memory value is accessed in DRAM. Pipelining is a technique in which memory loads the requested memory contents into a small cache composed of SRAM, then immediately begins fetching the next memory contents. This creates a two-stage pipeline, where data is read from or written to SRAM in one stage, and data is read from or written to memory in the other stage. Burst Mode is a High-speed transmission of a block of data (a series of consecutive addresses) when the processor requests a single address. |
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